https://github.com/adam0brien/embedded-systems-architecture-ca

https://github.com/adam0brien/embedded-systems-architecture-ca

Last synced: over 1 year ago
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• Host: GitHub
• URL: https://github.com/adam0brien/embedded-systems-architecture-ca
• Owner: Adam0Brien
• Created: 2023-09-21T15:38:16.000Z (almost 3 years ago)
• Default Branch: main
• Last Pushed: 2023-10-26T15:39:08.000Z (over 2 years ago)
• Last Synced: 2025-01-30T10:42:32.144Z (over 1 year ago)
• Language: C
• Homepage:
• Size: 645 KB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

          
# Embedded-Systems-Arch-Assignment1

The purpose of this assignment is to create a simple arithmetic logic unit using VHDL and to simulate it to examine its operation