https://github.com/admacpherson/cpu-simulator

Python program to simulate CPU functionalities
https://github.com/admacpherson/cpu-simulator

cache cpu cpu-simulator memory-bus python

Last synced: about 1 year ago
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Python program to simulate CPU functionalities

• Host: GitHub
• URL: https://github.com/admacpherson/cpu-simulator
• Owner: admacpherson
• Created: 2024-11-08T20:21:16.000Z (over 1 year ago)
• Default Branch: main
• Last Pushed: 2025-02-18T23:31:51.000Z (about 1 year ago)
• Last Synced: 2025-02-19T00:27:45.173Z (about 1 year ago)
• Topics: cache, cpu, cpu-simulator, memory-bus, python
• Language: Python
• Homepage:
• Size: 46.9 KB
• Stars: 1
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

          
# CPU-Simulator

![Python Badge](https://img.shields.io/badge/Python-FFD43B?style=for-the-badge&logo=python&logoColor=blue)


Python program to simulate CPU functionalities using OOP structure.

## Structure

📁[inputs](https://github.com/admacpherson/CPU-Simulator/tree/main/Inputs) - Modifiable input files to be read into simulation


| [`data_input`](https://github.com/admacpherson/CPU-Simulator/blob/main/Inputs/data_input.txt) - Contains sample data that are read into memory bus


| [`instruction input`](https://github.com/admacpherson/CPU-Simulator/blob/main/Inputs/instruction_input.txt) - Contains sample instructions that are read into CPU


[`cache.py`](https://github.com/admacpherson/CPU-Simulator/blob/main/cache.py) - Cache class


[`cpu.py`](https://github.com/admacpherson/CPU-Simulator/blob/main/cpu.py) - CPU class that contains the bulk of the applicable programming. Utilizes intstantiations of the cache and memory bus


[`main.py`](https://github.com/admacpherson/CPU-Simulator/blob/main/main.py) - Instantiates CPU, reads applicable data, and runs the simulation


[`memory.py`](https://github.com/admacpherson/CPU-Simulator/blob/main/memory.py) - Memory bus class

## Instruction Key

|Command|Argument|Function|

|---|---|---|

|CACHE|0|Turn cache off|

|CACHE|1|Turn cache on|

|CACHE|2|Flush cache|

|JMP|INT|Jump to specified position

|ADD|Destination, Source, Target|Add target and source register values on destination register|

|ADDI|Destination, Source, Immediate|Add immediate value to source register on destination register|

|HALT||Halt program|

## References

Code is based on Codecademy's CPU Simulator Portfolio Project.


Thanks to Dr. Timothy Heil for his computer architecture knowledge.