https://github.com/ajn313/ROME-LLM

Tools for Recurrent Optimization via Machine Editing and related benchmarks
https://github.com/ajn313/ROME-LLM

Last synced: 3 days ago
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Tools for Recurrent Optimization via Machine Editing and related benchmarks

• Host: GitHub
• URL: https://github.com/ajn313/ROME-LLM
• Owner: ajn313
• Created: 2024-07-27T17:07:29.000Z (5 months ago)
• Default Branch: main
• Last Pushed: 2024-08-03T22:05:24.000Z (5 months ago)
• Last Synced: 2024-08-04T22:45:47.508Z (5 months ago)
• Language: Jupyter Notebook
• Size: 929 KB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

Awesome Lists containing this project

• awesome_ai_agents - Rome-Llm - Tools for Recurrent Optimization via Machine Editing and related benchmarks (Building / Tools)
• awesome_ai_agents - Rome-Llm - Tools for Recurrent Optimization via Machine Editing and related benchmarks (Building / Tools)

README

        
# Recurrent Optimization via Machine Editing: ROME

The ROME tool automates hardware design with minimal human input. A large language model (LLM) is utilized to generate Verilog and fix errors in the resultant modules within a multi-stage design pipeline.

![ROME-flowchart](https://github.com/ajn313/ROME-LLM/blob/main/supplements/flowchart.png)

We provide a [Colab notebook](https://github.com/ajn313/ROME-LLM/blob/main/ROME_demo.ipynb) which implements the tool. GPT-4 is used by default which will require an OpenAI API Key, but instructions to modify this will be provided.

The necessary inputs include the names of a series of simpler submodules which can be built up into a more complex target modules, as well as unit testbenches for each submodule. We include testbenches for a few hierarchical arcitectures, and more will continue to be added. 

GitHub still under construction. 

## Citation

### Paper on arXiv:

[Link](https://arxiv.org/abs/2407.18276)

### BibTeX:

```

@misc{nakkab2024romebuiltsinglestep,

      title={Rome was Not Built in a Single Step: Hierarchical Prompting for LLM-based Chip Design}, 

      author={Andre Nakkab and Sai Qian Zhang and Ramesh Karri and Siddharth Garg},

      year={2024},

      eprint={2407.18276},

      archivePrefix={arXiv},

      primaryClass={cs.AR},

      url={https://arxiv.org/abs/2407.18276}, 

}

```

## Acknowledgements

Special thanks to [Jason Blocklove](https://github.com/JBlocklove) for his work on error correction feedback loops for hardware design