https://github.com/akhilrai28/alarm-clock
This project implements a fully functional digital alarm clock using Verilog and Vivado. The design includes features such as setting the time, alarm functionality, and real-time clock display. The project simulates clock timing and alarm triggers, with testbenches for verifying accuracy and reliability on FPGA.
https://github.com/akhilrai28/alarm-clock
alarm alarm-clock clock fpga hardware real-time simulation testbench verilog vivado
Last synced: 6 months ago
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This project implements a fully functional digital alarm clock using Verilog and Vivado. The design includes features such as setting the time, alarm functionality, and real-time clock display. The project simulates clock timing and alarm triggers, with testbenches for verifying accuracy and reliability on FPGA.
- Host: GitHub
- URL: https://github.com/akhilrai28/alarm-clock
- Owner: AkhilRai28
- Created: 2024-08-26T06:11:48.000Z (almost 2 years ago)
- Default Branch: main
- Last Pushed: 2024-08-26T06:19:44.000Z (almost 2 years ago)
- Last Synced: 2025-02-08T01:18:32.679Z (over 1 year ago)
- Topics: alarm, alarm-clock, clock, fpga, hardware, real-time, simulation, testbench, verilog, vivado
- Language: VHDL
- Homepage:
- Size: 130 KB
- Stars: 2
- Watchers: 1
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
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README
# Alarm-Clock
This project implements a fully functional digital alarm clock using Verilog and Vivado. The design includes features such as setting the time, alarm functionality, and real-time clock display. The project simulates clock timing and alarm triggers, with testbenches for verifying accuracy and reliability on FPGA.