https://github.com/akira2963753/mips-5stage-cpu
This is NTUST-EE 2025 Computer Organization, the course's final project is the implementation of the 5-stage pipelined cpu based on mips.
https://github.com/akira2963753/mips-5stage-cpu
5-stage-pipelined-processor computer-organisation-architechure cpu mips-cpu mips-processor
Last synced: 3 days ago
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This is NTUST-EE 2025 Computer Organization, the course's final project is the implementation of the 5-stage pipelined cpu based on mips.
- Host: GitHub
- URL: https://github.com/akira2963753/mips-5stage-cpu
- Owner: akira2963753
- License: mit
- Created: 2025-03-22T19:06:09.000Z (about 1 year ago)
- Default Branch: main
- Last Pushed: 2026-03-16T10:25:44.000Z (3 months ago)
- Last Synced: 2026-03-16T23:12:29.996Z (3 months ago)
- Topics: 5-stage-pipelined-processor, computer-organisation-architechure, cpu, mips-cpu, mips-processor
- Language: Verilog
- Homepage:
- Size: 11.2 MB
- Stars: 2
- Watchers: 1
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
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README
NTUST-EE 2025 Computer Organization
-
###### This is the course content for *NTUST-EE 2025 Computer Organization*.
###### The code in this GitHub repository is provided for reference purposes only.
###### If you encounter any issues, feel free to contact "harry2963753@gmail.com".
###### Do not plagiarize — the professor will check for academic violations.
#
#### Development Environment :
##### RTL Simulator : *ModelSim-Intel FPGA Standard Edition, Version 20.1.1, windows*
##### Synthesis Tool : *The OpenROAD-flow-scripts from github*
##### MIPS Decoder and Corrector : *It can help you to transfer .asm to Instruction Memory and verify your answer, Python*
#
#### Area/Critical Path Slack Ranking and Final Score :
| Project | Part | Area | Critical Path Slack | Ranking | Score |
|:----:|:------:|:-----:|:-----:|:-----:|:-----:|
| [PA1](./PA1) | CompMultiplier | 1223.334 | 4.5237 | 1% | 100 |
| [PA1](./PA1) | CompDivider | 1223.068 | 4.4499 | 1% | 100 |
| [PA2](./PA2) | SimpleCPU (MemSize=128) | 33743.972 | 4.4097 | 1% | 100 |
| [PA2](./PA2) | SimpleCPU (MemSize=12) | 14098.532 | 4.4039 | 1% | 100 |
| [PA3](./PA3) | FinalCPU (MemSize=32) | 18500.034 | 4.2721(1.7721+2.5) | 1% | 100 |
#### Final CPU : 5-Stage Pipelined Processor with Forwarding and Hazard Detection
