https://github.com/alexforencich/pin-uart

FPGA board-level debugging and reverse-engineering tool
https://github.com/alexforencich/pin-uart

fpga pcb reverse-engineering

Last synced: 29 days ago
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FPGA board-level debugging and reverse-engineering tool

• Host: GitHub
• URL: https://github.com/alexforencich/pin-uart
• Owner: alexforencich
• Created: 2023-02-27T02:45:51.000Z (almost 2 years ago)
• Default Branch: master
• Last Pushed: 2023-03-24T07:36:09.000Z (almost 2 years ago)
• Last Synced: 2024-11-14T01:34:37.120Z (3 months ago)
• Topics: fpga, pcb, reverse-engineering
• Language: Tcl
• Homepage:
• Size: 12.7 KB
• Stars: 29
• Watchers: 5
• Forks: 3
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# Pin UART Readme

GitHub repository: https://github.com/alexforencich/pin-uart

## Introduction

The pin UART is an FPGA board-level debugging and reverse-engineering utility.  The design drives pin names out of all of the IO pins on a device, which can then be probed with an oscilloscope with serial decode capability.

The build is scripted to generate the top-level HDL and pin constraint files based on the device pins.  Currently, only Vivado is supported, but it should be straightforward to port to other tools.

## Documentation

### `pin_uart` module

The `pin_uart` module is a simple state machine that will shift out the configured string when triggered, including appropriate start and stop bits.