https://github.com/aliadelmahdi/traffic-light-uvm
This repository contains the verification of a traffic light control system using UVM (Universal Verification Methodology). The environment includes: Assertions – Ensuring correct light transitions and system behavior. Cover Directives – Tracking key events and light algorithm. Functional Coverage – Measuring test effectiveness.
https://github.com/aliadelmahdi/traffic-light-uvm
systemverilog traffic-light uvm-verification verilog
Last synced: 3 days ago
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This repository contains the verification of a traffic light control system using UVM (Universal Verification Methodology). The environment includes: Assertions – Ensuring correct light transitions and system behavior. Cover Directives – Tracking key events and light algorithm. Functional Coverage – Measuring test effectiveness.
- Host: GitHub
- URL: https://github.com/aliadelmahdi/traffic-light-uvm
- Owner: aliadelmahdi
- Created: 2025-03-31T10:32:17.000Z (7 months ago)
- Default Branch: main
- Last Pushed: 2025-04-15T04:43:28.000Z (6 months ago)
- Last Synced: 2025-05-28T00:11:24.166Z (5 months ago)
- Topics: systemverilog, traffic-light, uvm-verification, verilog
- Language: SystemVerilog
- Homepage:
- Size: 12.7 MB
- Stars: 0
- Watchers: 0
- Forks: 0
- Open Issues: 0