https://github.com/andrescv/Jupiter

RISC-V Assembler and Runtime Simulator
https://github.com/andrescv/Jupiter

asm assembler education risc risc-v riscv riscv-simulator runtime runtime-simulator rv32 rv32g simulator

Last synced: 11 days ago
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RISC-V Assembler and Runtime Simulator

• Host: GitHub
• URL: https://github.com/andrescv/Jupiter
• Owner: andrescv
• License: gpl-3.0
• Created: 2017-12-23T00:18:21.000Z (almost 7 years ago)
• Default Branch: main
• Last Pushed: 2024-06-08T23:17:39.000Z (5 months ago)
• Last Synced: 2024-06-20T10:07:27.932Z (5 months ago)
• Topics: asm, assembler, education, risc, risc-v, riscv, riscv-simulator, runtime, runtime-simulator, rv32, rv32g, simulator
• Language: JavaScript
• Homepage: https://jupitersim.gitbook.io/
• Size: 49.8 MB
• Stars: 409
• Watchers: 12
• Forks: 35
• Open Issues: 12
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

        


  

    

  

  



  

    

  

  

    

  

  

    

  

  

    

  

  

    

  

  

    

  



**Jupiter** is an open source and education-oriented RISC-V assembler and runtime simulator. It is written in Java and capable of simulate all the instructions of the base integer ISA (`I` extension) plus the `M` and `F` extensions (**RV32IMF**), including all the pseudo-instructions described in the user-level instruction set manual1. It was developed taking into account that it could be used in various courses such as: _Computer Architecture, Compilers_ and _Assembly Programming_.

### Features

* **User Friendly**: Jupiter was designed focused on education and for all the people that are getting to know the RISC-V architecture. It places for priority the user experience. Jupiter has two modes of operation (_Command Line Interface_ and _Graphical User Interface_) and both of these were developed to be intuitive and easy to use.

* **Modularity**: Jupiter can assemble and simulate several files at once, not everything has to be one file of 1,000 lines of code. Simply indicate by a global label what is the main starting point of the program. This permits modularity and enables the creation of projects and laboratories more easily.

* **Feedback**: People using Jupiter gets feedback on what they are doing wrong :100:. The simulator shows different types of errors like: syntax errors, when trying to access reserved memory or when trying to write to a read-only memory.

* **Cross-platform**: Jupiter is available for **Linux** (_Ubuntu_), **macOS** and **Windows**.

### Documentation

Please visit the following [link](https://docs.riscvsim.com/) for more info and documentation.

### Screenshots



  

  GUI Mode





  

  CLI Mode



### Installation

Download the app image for your operating system and unzip the file:

* [Jupiter v3.1 - Linux (Ubuntu)](https://github.com/andrescv/Jupiter/releases/download/v3.1/Jupiter-3.1-linux.zip)

* [Jupiter v3.1 - macOS](https://github.com/andrescv/Jupiter/releases/download/v3.1/Jupiter-3.1-mac.zip)

* [Jupiter v3.1 - Windows](https://github.com/andrescv/Jupiter/releases/download/v3.1/Jupiter-3.1-win.zip)

#### Running Jupiter on Linux or macOS

```shell

./image/bin/jupiter # for GUI mode

./image/bin/jupiter [options]  # for CLI mode

```

#### Running Jupiter on Windows

```shell

image\bin\jupiter # for GUI mode

image\bin\jupiter [options]  # for CLI mode

```

### Contributing

Pull requests and stars are always welcome. For bugs and feature requests, [please create an issue](https://github.com/andrescv/Jupiter/issues/new).

### Other great simulators

* [Venus](https://github.com/ThaumicMekanism/venusbackend): Berkeley's Web-based simulator originally developed by [@kvakil](https://github.com/kvakil) and then updated and improved by [@ThaumicMekanism](https://github.com/ThaumicMekanism).

* [RARS](https://github.com/TheThirdOne/rars): RISC-V Assembler and Runtime Simulator (RARS), based on the originally MARS simulator, but refactored for the RISC-V architecture by [@TheThirdOne](https://github.com/TheThirdOne).

* [Ripes](https://github.com/mortbopet/Ripes): A graphical 5-stage RISC-V pipeline simulator & assembly editor developed by [@mortbopet](https://github.com/mortbopet).

* [Spike](https://github.com/riscv/riscv-isa-sim): The original RISC-V ISA simulator that implements a functional model of one or more RISC-V harts.

### Acknowledgments

A big thank you to all the people working on the RISC-V project.

### References

1. https://github.com/riscv/riscv-isa-manual

2. http://courses.missouristate.edu/KenVollmar/mars/index.htm

3. https://github.com/kvakil/venus

4. https://en.wikipedia.org/wiki/Jupiter

5. https://en.wikipedia.org/wiki/DLX