https://github.com/arda-guler/turnacore
An imaginary 16-bit CPU architecture with custom assembly language and instructions
https://github.com/arda-guler/turnacore
asm assembly challenge cpu cpu-emulator educational emulator experimental low-level memory processor processor-architecture processor-simulator ram
Last synced: about 2 months ago
JSON representation
An imaginary 16-bit CPU architecture with custom assembly language and instructions
- Host: GitHub
- URL: https://github.com/arda-guler/turnacore
- Owner: arda-guler
- License: mit
- Created: 2023-09-27T23:45:12.000Z (almost 2 years ago)
- Default Branch: master
- Last Pushed: 2023-12-14T20:09:40.000Z (over 1 year ago)
- Last Synced: 2023-12-14T21:26:42.588Z (over 1 year ago)
- Topics: asm, assembly, challenge, cpu, cpu-emulator, educational, emulator, experimental, low-level, memory, processor, processor-architecture, processor-simulator, ram
- Language: Python
- Homepage:
- Size: 9.14 MB
- Stars: 4
- Watchers: 1
- Forks: 0
- Open Issues: 0