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https://github.com/arkaeriit/rom_maker
Generate Verilog ROMS from binary files.
https://github.com/arkaeriit/rom_maker
Last synced: 26 days ago
JSON representation
Generate Verilog ROMS from binary files.
- Host: GitHub
- URL: https://github.com/arkaeriit/rom_maker
- Owner: Arkaeriit
- License: mit
- Created: 2021-08-14T23:15:46.000Z (over 3 years ago)
- Default Branch: master
- Last Pushed: 2022-04-30T21:36:24.000Z (over 2 years ago)
- Last Synced: 2023-03-06T21:51:55.020Z (almost 2 years ago)
- Language: Lua
- Size: 10.7 KB
- Stars: 0
- Watchers: 2
- Forks: 0
- Open Issues: 0