https://github.com/augustunderground/baceball
Bayesian Methods with ACE
https://github.com/augustunderground/baceball
analog-circuit bayesian-optimization hy optimization scikit-optimize visualization
Last synced: 4 months ago
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Bayesian Methods with ACE
- Host: GitHub
- URL: https://github.com/augustunderground/baceball
- Owner: AugustUnderground
- License: mit
- Created: 2021-10-25T14:52:32.000Z (over 4 years ago)
- Default Branch: master
- Last Pushed: 2021-11-18T07:01:41.000Z (over 4 years ago)
- Last Synced: 2026-01-12T05:48:54.668Z (5 months ago)
- Topics: analog-circuit, bayesian-optimization, hy, optimization, scikit-optimize, visualization
- Language: Hy
- Homepage:
- Size: 74 MB
- Stars: 0
- Watchers: 2
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
README
bAC²Eball
Using [Bayesian methods](https://scikit-optimize.github.io/) for hyper
parameter optimization with [AC²E](https://github.com/matthschw/ace) takes
about as long as nine innings.
Best Model NAND4

| Description | Value |
|-------------|-------------|
| optimzer | gp_minimize |
| estimator | GBRT |
| generator | sobol |
| acquisitor | PI |
| wn0 | 0.000015 |
| wn1 | 0.000029 |
| wn2 | 0.000045 |
| wn3 | 0.000072 |
| wp | 0.000041 |
| vs0 | 1.6602 |
| vs1 | 1.652853 |
| vs2 | 1.662488 |
| vs3 | 1.659937 |
| cost | 0.021502 |
See the reports on optimizing an [inverter chain](./docs/nand4.md) and a
[schmitt trigger](./docs/st1.md) for a detailed comparison of algorithms
offered by scikit-optimize.
These plots were generated by running `bace.hy`.
## Setup
The basic setup is as follows:
```hy
(optimizer :func design-objective
:dimensions design-space
:n-calls 128
:n-random-starts 32
:base-estimator estimator
:initial-point-generator generator
:acq-func acquisitor
:xi 0.01
:kappa 1.96
:random-state 666
:n-jobs 42
:verbose True)
```
Where
- `optimizer ∈ [forest-minimize gbrt-minimize gp-minimize]`
- `estimator ∈ ["GP" "RF" "ET" "GBRT"]`
- `generator ∈ ["random" "sobol" "halton" "hammersly" "lhs" "grid"]`
- `acquisitor ∈ ["LCB" "EI" "PI"]`
## Dependencies
- [AC²E](https://github.com/matthschw/ace)
- [HAC²E](https://github.com/augustunderground/hace)
## WIP
- [ ] Vary `kappa` and `xi`
- [ ] Find way to benchmark `ps` variants
- [ ] Try optimizing amplifiers
## Design Objective NAND4

Optimize the widths `[wn0, wn1, wn2, wn3, wp]` such that the switching voltages
`vsi = vdd / 2 = 1.65V` where `i ∈ [0,1,2,3]`.
### Design Space
```hy
(setv design-space
[ (space.Real 0.4e-6 150e-6 :name "wn0" :prior "normal")
(space.Real 0.4e-6 150e-6 :name "wn1" :prior "normal")
(space.Real 0.4e-6 150e-6 :name "wn2" :prior "normal")
(space.Real 0.4e-6 150e-6 :name "wn3" :prior "normal")
(space.Real 0.4e-6 150e-6 :name "wp" :prior "normal") ])
```