Ecosyste.ms: Awesome

An open API service indexing awesome lists of open source software.

Awesome Lists | Featured Topics | Projects

https://github.com/ayeshathoi/cse-306

Computer Architecture Hardware Sessional
https://github.com/ayeshathoi/cse-306

arithmetic-logic-unit computer-architecture floating-point-adder mips-processor simulation

Last synced: 1 day ago
JSON representation

Computer Architecture Hardware Sessional

Awesome Lists containing this project

README

        

## **`CSE 306` : Computer Architecture Sessional**

- [Arithmetic Logic Unit (ALU)](https://github.com/ayeshathoi/CSE-306/tree/main/Assignment%201) : Implemented 4-bit Arithmetic logic unit (ALU) with LED and ATmega32 desgining the soft circuit in Logisim | Flags : Carry, Sign, Overflow, Zero flags | Operation : Add, Add with carry, AND, Transter A, Increment A, XOR | Soft Circuit Diagram | Hardware Diagram
- [Floating Point Adder (FPA)](https://github.com/ayeshathoi/CSE-306/tree/main/Assignment%202) : Implemented 32-bits Floating Point Arithmetic Unit (FPU) with ATmega32 and Logisim | 1 Sign bit, 10 exponent bits, 21 Fraction bits (Lowest bits) | The numbers are in normalized form. There are two flags U (underflow) and O (overflow) which are set if the result is too small or too large to be represented in the format | Report | Flowchart
- [8 Bit MIPS Processor](https://github.com/ayeshathoi/CSE-306/tree/main/Assignment%203) : Implemented a 4-bit MIPS Processor : Arithmetic Logic Unit (ALU), Control Unit and Datapath. For the simulation, we have used 1-RAM, 2-ROMs, 2-Shifters and 3-ALUs but in hardware implementation, we have used ATMega32 since we can program ATMega32 to add, subtract and store data | Report | Codes
- *Collaborator* :

- Noshin Nawal (1805061)
- Razin Reaz Abedin (1805074)
- Maneesha Rani Saha (1805076)
- Sumaiya Sultana Any (1805079)