https://github.com/bluecmd/sva-playground
Place to learn and try out SystemVerilog Assertions (SVA)
https://github.com/bluecmd/sva-playground
Last synced: 4 months ago
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Place to learn and try out SystemVerilog Assertions (SVA)
- Host: GitHub
- URL: https://github.com/bluecmd/sva-playground
- Owner: bluecmd
- License: mit
- Created: 2020-09-25T08:19:58.000Z (over 5 years ago)
- Default Branch: master
- Last Pushed: 2020-09-28T09:22:31.000Z (over 5 years ago)
- Last Synced: 2025-09-11T18:56:23.910Z (9 months ago)
- Language: SystemVerilog
- Size: 26.4 KB
- Stars: 3
- Watchers: 2
- Forks: 1
- Open Issues: 0
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Metadata Files:
- Readme: README.md
- License: LICENSE
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README
# sva playground
This is a place where I dump some learning examples I create when learning
about using SystemVerilog Assertions, Coverage, and Formal Verification.
The examples are:
1. [safecracker](safecracker/) Let's crack a forgotten safe code using SVA
1. [backdoor](backdoor/) Let's (dis?)prove the existance of a backdoor code