https://github.com/bu-icsg/dana

Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel
https://github.com/bu-icsg/dana

chisel hardware neural-network riscv rocc rocket-chip rtl

Last synced: about 2 months ago
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Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel

• Host: GitHub
• URL: https://github.com/bu-icsg/dana
• Owner: bu-icsg
• License: other
• Created: 2016-02-21T22:25:45.000Z (over 8 years ago)
• Default Branch: master
• Last Pushed: 2020-01-23T13:33:23.000Z (over 4 years ago)
• Last Synced: 2024-07-30T03:13:47.690Z (about 2 months ago)
• Topics: chisel, hardware, neural-network, riscv, rocc, rocket-chip, rtl
• Language: Scala
• Homepage:
• Size: 1.81 MB
• Stars: 205
• Watchers: 31
• Forks: 36
• Open Issues: 24
• Metadata Files:
  • Readme: README.md
  • Contributing: CONTRIBUTING.md
  • License: LICENSE.BU

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