https://github.com/bucknalla/ip_cores
Verilog IP Cores & Tests
https://github.com/bucknalla/ip_cores
ofdm rf vivado xilinx
Last synced: 3 days ago
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Verilog IP Cores & Tests
- Host: GitHub
- URL: https://github.com/bucknalla/ip_cores
- Owner: Bucknalla
- License: mit
- Created: 2017-12-20T17:46:50.000Z (almost 8 years ago)
- Default Branch: master
- Last Pushed: 2018-05-03T16:40:32.000Z (over 7 years ago)
- Last Synced: 2025-01-30T21:35:18.734Z (9 months ago)
- Topics: ofdm, rf, vivado, xilinx
- Language: VHDL
- Homepage:
- Size: 31.9 MB
- Stars: 12
- Watchers: 4
- Forks: 3
- Open Issues: 0