https://github.com/calint/tang-nano-9k--step-7

https://github.com/calint/tang-nano-9k--step-7

Last synced: 3 days ago
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• Host: GitHub
• URL: https://github.com/calint/tang-nano-9k--step-7
• Owner: calint
• Created: 2024-06-07T10:23:59.000Z (5 months ago)
• Default Branch: main
• Last Pushed: 2024-06-07T18:32:32.000Z (5 months ago)
• Last Synced: 2024-06-08T11:53:03.988Z (5 months ago)
• Language: Verilog
• Size: 193 KB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# Tang Nano 9K

step-wise development towards a RISC-V rv32i implementation supporting cache of PSRAM