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https://github.com/charkster/tang_nano_9k-uart_block_ram
UART interface to a block ram in the Tang Nano 9k FPGA. No pin connections needed, just use the USB UART.
https://github.com/charkster/tang_nano_9k-uart_block_ram
block-ram tang-nano-9k uart
Last synced: about 17 hours ago
JSON representation
UART interface to a block ram in the Tang Nano 9k FPGA. No pin connections needed, just use the USB UART.
- Host: GitHub
- URL: https://github.com/charkster/tang_nano_9k-uart_block_ram
- Owner: charkster
- License: mit
- Created: 2022-05-17T02:09:38.000Z (over 2 years ago)
- Default Branch: main
- Last Pushed: 2023-01-02T16:55:04.000Z (almost 2 years ago)
- Last Synced: 2023-04-29T22:59:05.139Z (over 1 year ago)
- Topics: block-ram, tang-nano-9k, uart
- Language: SystemVerilog
- Homepage:
- Size: 937 KB
- Stars: 3
- Watchers: 3
- Forks: 1
- Open Issues: 0