Ecosyste.ms: Awesome
An open API service indexing awesome lists of open source software.
https://github.com/charkster/usb_pd_monitor
USB PD cc pin monitor implemented in a Tang Nano 9K FPGA.
https://github.com/charkster/usb_pd_monitor
fpga tang-nano-9k usb-pd
Last synced: about 17 hours ago
JSON representation
USB PD cc pin monitor implemented in a Tang Nano 9K FPGA.
- Host: GitHub
- URL: https://github.com/charkster/usb_pd_monitor
- Owner: charkster
- License: mit
- Created: 2022-04-30T01:58:16.000Z (over 2 years ago)
- Default Branch: main
- Last Pushed: 2024-02-11T21:42:28.000Z (9 months ago)
- Last Synced: 2024-02-11T22:39:09.355Z (9 months ago)
- Topics: fpga, tang-nano-9k, usb-pd
- Language: SystemVerilog
- Homepage:
- Size: 4.41 MB
- Stars: 11
- Watchers: 4
- Forks: 1
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
README
# usb_pd_monitor
**USB PD monitor** implemented in a **Tang Nano 9K** FPGA board. USB-PD packet data is **decoded from the CC pins** and then sent out the FPGA as **UART TX data**. The Tang Nano 9K's **USB-to-UART** bridge (software FTDI FT2232C running on the BL702 IC) can be accessed with **Python** to see the packet data.
**The only physical connections needed are CC1, CC2 and their ground pins**. The Tang Nano 9K is powered by the USB connection to the host computer.
![picture](https://github.com/charkster/tang_nano_9k-uart_block_ram/blob/main/images/tang_nano_9k_pinout.png)
Using the **1.8V pins**, this FPGA board is able to monitor the USB-PD messages on the CC pins **without any levelshifters**.See [fpga/src/tang_nano_9k_generic.cst](https://github.com/charkster/usb_pd_monitor/blob/main/fpga/src/tang_nano_9k_generic.cst) for pins used. **3.3V buffered CC1 and CC2 outputs are available to veiw with a logic analyzer** (I highly recommend the [$12 Saleae clones on Amazon.com](https://www.amazon.com/HiLetgo-Analyzer-Ferrite-Channel-Arduino/dp/B077LSG5P2), as sigrok pulseview has full USB PD decoding). I also have a 3.3V buffered "uart_tx_buf" signal which can connect to a logic analyzer or another serial-to-usb adapter.
Tang Nano 9k board Info:
https://wiki.sipeed.com/hardware/en/tang/Tang-Nano-9K/Nano-9K.htmlI used the eLabBay USB C passthrough breakout board:
![picture](https://github.com/charkster/usb_pd_monitor/blob/main/images/usb_c_passthrough_breakout.png)
https://elabbay.myshopify.com/products/usb3-1-cm-cf-v1a-usb3-1-type-c-male-to-female-pass-through-breakout-boardHere are some captures from **Sigrok's Pulseview using my HiLetgo $12 logic analyzer**:
D0 is the buffered 3.3V version of the CC pin data. D1 is the 3.3V uart_tx_buf that the FPGA sends to the USB-to-UART bridge IC on the Tang Nano board. Pulseview is able to fully decode the 3.3V CC pin data.
![picture](https://github.com/charkster/usb_pd_monitor/blob/main/images/usb_pd_get_source_cap1.png)
![picture](https://github.com/charkster/usb_pd_monitor/blob/main/images/usb_pd_good_crc.png)