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https://github.com/chipsalliance/tilelink
https://github.com/chipsalliance/tilelink
Last synced: 3 months ago
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- Host: GitHub
- URL: https://github.com/chipsalliance/tilelink
- Owner: chipsalliance
- Created: 2023-02-11T12:24:50.000Z (almost 2 years ago)
- Default Branch: master
- Last Pushed: 2024-01-25T03:02:49.000Z (12 months ago)
- Last Synced: 2024-11-01T02:35:46.104Z (3 months ago)
- Language: Scala
- Size: 6.68 MB
- Stars: 25
- Watchers: 11
- Forks: 8
- Open Issues: 6
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Metadata Files:
- Readme: readme.md
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README
# Tilelink
The interconnect IP designed for SiFive TileLink Specification.
## License
The SiFive TileLink Specification is the property of SiFive, Inc.
The Hardware IP generators implemented in this library are under [Apache-2.0 License](https://opensource.org/licenses/Apache-2.0).