https://github.com/chuzhe-as-a-dev/Digital-Component-Design-labs-2017

Solution of labs from SE345 (Digital Component Design), SJTU
https://github.com/chuzhe-as-a-dev/Digital-Component-Design-labs-2017

Last synced: about 2 months ago
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Solution of labs from SE345 (Digital Component Design), SJTU

• Host: GitHub
• URL: https://github.com/chuzhe-as-a-dev/Digital-Component-Design-labs-2017
• Owner: chuzhe-as-a-dev
• Created: 2018-01-11T14:37:43.000Z (almost 7 years ago)
• Default Branch: master
• Last Pushed: 2018-01-11T14:38:33.000Z (almost 7 years ago)
• Last Synced: 2024-05-22T03:11:38.930Z (8 months ago)
• Language: Verilog
• Size: 16.1 MB
• Stars: 0
• Watchers: 2
• Forks: 1
• Open Issues: 1
• Metadata Files:
  • Readme: README.md

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