https://github.com/cliche-niche/cs220

Contains assignment submissions made for the course CS220 "Computer Organisation" at IIT-K in the 2021-22 II Sem.
https://github.com/cliche-niche/cs220

assignments computer-organization cs220 iitk

Last synced: 5 months ago
JSON representation

Contains assignment submissions made for the course CS220 "Computer Organisation" at IIT-K in the 2021-22 II Sem.

• Host: GitHub
• URL: https://github.com/cliche-niche/cs220
• Owner: cliche-niche
• Created: 2022-01-25T09:11:24.000Z (over 4 years ago)
• Default Branch: main
• Last Pushed: 2022-07-07T01:05:02.000Z (almost 4 years ago)
• Last Synced: 2025-06-19T19:00:02.035Z (about 1 year ago)
• Topics: assignments, computer-organization, cs220, iitk
• Language: Verilog
• Homepage:
• Size: 1.52 MB
• Stars: 1
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

Awesome Lists containing this project

README

          
This repository contains the programming assignments we had to submit in the course [CS220: Computer Organisation](https://www.cse.iitk.ac.in/pages/CS220.html) (2021-22 II Sem.) in a team of three.
 

The languages used in assignments were majorly `Verilog` and `Assembly` ([MIPS ISA](https://en.wikipedia.org/wiki/MIPS_architecture)).

The repository doesn't contain `.vvp` and `.vcd` files but can be generated by running the commands written [here](Instructions.md) in the directory that contains the corresponding `.v` file.


## Directories

+ [Hello](./Hello/) Contains some basic "Hello World" programs (in Verilog and MIPS). Verilog can be run with iVerilog and MIPS with QtSpim. For help, consider [Instructions](./Instructions.md).

+ [Assignment 1:](./A1/) Implement an `8-bit adder`, `8-bit comparator`, `3-to-8 decoder`, and an `8-to-3 priority encoder`.

+ [Assignment 2:](./A2/) Implement an `8-bit carry look-ahead adder`, and an `8-bit Johnson Counter`.

+ [Assignment 3:](./A3/) Implement a `(1010) Sequence Detector`, and a `3-bit Odd Parity Generator` in the form of an `FSM`.

+ [Assignment 4:](./A4/) Implement a `3-bit Gray code counter` in the form of an `FSM`, and an `8-bit adder/subtractor`.

+ [Assignment 5:](./A5/) Implement a `GCD calculator` [Stein's Algorithm](https://en.wikipedia.org/wiki/Binary_GCD_algorithm) in `Verilog`, and write code for `Insertion Sort`, generating `Fibonacci Numbers`, and `alternatively adding/subtracting` floats in a vector of size `p` in `MIPS`.

+ [Quiz 3:](./Q3/) Contains my submissions in Quiz 3. MIPS programs to find `quotient` and `remainder`, `slope` of a line, and `binary search`. The submission for the binary search does not work properly in the case when the key is present in the array.

### Remarks

+ [Assignment 2](./A2/): 5 marks deducted in the Report because truth table of Johnson counter not included.

+ [Assignment 3](./A3/): 5 marks deducted in the Second Question, no feedback provided.

+ [Assignment 4](./A4/): 5 marks deducted, no feedback provided.

+ [Quiz 3](./Q3/Q3.s): 20 marks deducted, since binary search did not work properly.

+ You may refer to [instructions](./Instructions.md) for running verilog codes or MIPS programs.

+ You may use [this](./MIPS.md) as a glossary or for some common commands in MIPS.

+ There was another assignment/ lab session, where we were made to burn an FPGA board to implement a `1-bit Full Adder` and a `2-to-1 MUX`. Unfortunately, I cannot provide the codes used directly. However, we used [this](https://github.com/FrankBuss/YaGraphCon/blob/master/spartan3e/src/spartan3e.ucf) for the constraint file.

+ Most of the students either did not use LaTeX for assignment reports, or imported hand-drawn diagrams. I sticked to LaTeX despite disapproval and/or lack of support. The package used to draw the circuits is `circuitikz` and `karnaugh-map` for K-maps.