https://github.com/cnrv/CNRV-FPU

Basic floating-point components for RISC-V processors
https://github.com/cnrv/CNRV-FPU

Last synced: 2 months ago
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Basic floating-point components for RISC-V processors

• Host: GitHub
• URL: https://github.com/cnrv/CNRV-FPU
• Owner: cnrv
• Created: 2017-08-13T12:04:06.000Z (over 7 years ago)
• Default Branch: master
• Last Pushed: 2019-12-04T13:30:32.000Z (about 5 years ago)
• Last Synced: 2024-08-02T01:16:40.938Z (6 months ago)
• Language: C
• Size: 97.7 KB
• Stars: 61
• Watchers: 14
• Forks: 22
• Open Issues: 2
• Metadata Files:
  • Readme: README.md

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README

        
# RISCV-FPU

This project is aiming to design necessary floating-piont components for implementing RISCV processors.

These components need to be tweaked for different implementations. I provide them just as reference designs. They have better PPA than the Berkeley hard-float and synopsys DesignWare.