https://github.com/colleagueriley/aricuit-sim

A basic digital logic simulator (program AND library) named after Aristotle, the father of logic made with RSGL.
https://github.com/colleagueriley/aricuit-sim

Last synced: about 1 year ago
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A basic digital logic simulator (program AND library) named after Aristotle, the father of logic made with RSGL.

• Host: GitHub
• URL: https://github.com/colleagueriley/aricuit-sim
• Owner: ColleagueRiley
• License: other
• Created: 2023-12-24T18:55:41.000Z (over 2 years ago)
• Default Branch: main
• Last Pushed: 2024-01-24T21:49:06.000Z (over 2 years ago)
• Last Synced: 2025-03-25T13:39:18.940Z (over 1 year ago)
• Language: C
• Size: 968 KB
• Stars: 5
• Watchers: 1
• Forks: 1
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

          
# Aricuit Sim

A basic digital logic simulator (inspired by Digital Logic Sim) named after Aristotle, the father of logic.

# component.h

component.h is a custom made library made specifically for this program.\

This allows people to easily create their own version of this program or their own additions, simply by editing the header file.\

It also allows a user to easily change how components are rendered and what backend the library uses for rendering

# Features

- drag components around

- delete components by dragging them back to the shop

- component shop

- component connections

- delete connections (by selecting the components you want to delete, the same way you would connect them)

- NOT gate

- AND gate

- OR gate

- LED output

- basic input

- basic button

- constants (0 and 1)

- buzzer

- clock (that can count up to 8-bits)

# Features todo

- save as file

- load file

- menu screen

- projects as modules

- module input

- scroll

- register

- ROM

- RAM

- LCD