https://github.com/cuppachino/bevy_logic

Simulate logic gates and signals in bevy
https://github.com/cuppachino/bevy_logic

bevy logic-gates simulation

Last synced: about 1 month ago
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Simulate logic gates and signals in bevy

• Host: GitHub
• URL: https://github.com/cuppachino/bevy_logic
• Owner: cuppachino
• License: mit
• Created: 2024-04-09T23:34:49.000Z (7 months ago)
• Default Branch: master
• Last Pushed: 2024-05-08T16:53:28.000Z (6 months ago)
• Last Synced: 2024-09-27T07:03:49.019Z (about 2 months ago)
• Topics: bevy, logic-gates, simulation
• Language: Rust
• Homepage: https://crates.io/crates/bevy_logic
• Size: 159 KB
• Stars: 19
• Watchers: 2
• Forks: 1
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

        
# `bevy_logic`

[![Crates.io](https://img.shields.io/crates/v/bevy_logic)](https://crates.io/crates/bevy_logic)

[![docs](https://docs.rs/bevy_logic/badge.svg)](https://docs.rs/bevy_logic/)

[![license](https://img.shields.io/badge/license-MIT-blue.svg)](https://github.com/cuppachino/bevy_logic/blob/main/LICENSE)

[![Crates.io](https://img.shields.io/crates/d/bevy_logic)](https://crates.io/crates/bevy_logic)

A logic gate simulation plugin for [`bevy`](https://bevyengine.org/).

## Features

- A `LogicGraph` resource for sorting (potentially cyclic) logic gate circuits.

- A fixed timestep `LogicUpdate` schedule that works just like bevy's `FixedUpdate`.

- A ternary approach to [`Signal`](src/logic/signal.rs), enabling non-boolean circuits and analog machines.

- [`LogicGate`](src/logic/mod.rs) trait queries.

- Builder traits for `World` and `Commands` that ease gate hierarchy construction.

- `Command`s for synchronizing a graph with the game world.

- Modular plugin design. Pick and choose which features you need.

### Running examples

```cmd

cargo run --release --example cycles

```

### Quickstart

Add the `LogicSimulationPlugin` to your app, and configure the `Time` resource

to tick at the desired speed.

```rust

const STEPS_PER_SECOND: f64 = 30.0;

app.add_plugins(LogicSimulationPlugin)

    .insert_resource(Time::::from_hz(STEPS_PER_SECOND));

```

### Custom logic gates

You can create your own logic gates by implementing the `LogicGate` trait...

```rust

use bevy_logic::prelude::*;

/// The XOR gate emits a signal if the number of "truthy" inputs is odd.

#[derive(Component, Clone, Copy, Debug, Default, Reflect)]

pub struct XorGate;

impl LogicGate for XorGate {

    fn evaluate(&mut self, inputs: &[Signal], outputs: &mut [Signal]) {

        let signal: Signal = inputs

            .iter()

            .filter(|s| s.is_truthy())

            .count()

            .is_odd()

            .into();

        outputs.set_all(signal);

    }

}

```

And then registering the component with `bevy_trait_query`...

```rust

struct CustomLogicPlugin;

impl Plugin for CustomLogicPlugin {

    fn build(&self, app: &mut App) {

        app.register_logic_gate::();

    }

}

```

You can use the `logic::commands` module to spawn gates and fans,

and then connect fans with wires. Make sure to `compile()` the logic graph.

```rust

fn spawn_custom_gate(mut commands: Commands, mut sim: ResMut) {

    let xor_gate = commands

        .spawn_gate((Name::new("XOR"), XorGate))

        .with_inputs(2)

        .with_outputs(1)

        .build();

    let not_gate = commands

        .spawn_gate((Name::new("NOT"), NotGate))

        .with_inputs(1)

        .with_outputs(1)

        .build();

    let wire = commands.spawn_wire(&not_gate, 0, &xor_gate, 0).downgrade();

    sim.add_data(vec![xor_gate, not_gate]).add_data(wire).compile();

}

```

## Bevy Compatibility

| `bevy` | `bevy_logic` |

| ------ | ------------ |

| 0.13.2 | 0.6.x        |