https://github.com/dyna-bytes/fisr

Specialized FPU for Fast Inverse Square Root Algorithm
https://github.com/dyna-bytes/fisr

fpu verilog

Last synced: 20 days ago
JSON representation

Specialized FPU for Fast Inverse Square Root Algorithm

• Host: GitHub
• URL: https://github.com/dyna-bytes/fisr
• Owner: dyna-bytes
• Created: 2022-03-21T05:00:48.000Z (almost 3 years ago)
• Default Branch: main
• Last Pushed: 2022-11-10T03:24:23.000Z (about 2 years ago)
• Last Synced: 2023-06-06T13:02:29.092Z (over 1 year ago)
• Topics: fpu, verilog
• Language: Verilog
• Homepage:
• Size: 1010 KB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0

Awesome Lists containing this project