https://github.com/eldesh/uvm_study

study UVM and SystemVerilog
https://github.com/eldesh/uvm_study

Last synced: 3 months ago
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study UVM and SystemVerilog

• Host: GitHub
• URL: https://github.com/eldesh/uvm_study
• Owner: eldesh
• Created: 2014-08-27T05:15:19.000Z (almost 11 years ago)
• Default Branch: master
• Last Pushed: 2014-08-27T05:16:12.000Z (almost 11 years ago)
• Last Synced: 2025-01-26T20:47:08.072Z (4 months ago)
• Language: SystemVerilog
• Size: 133 KB
• Stars: 0
• Watchers: 2
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: readme.md

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README

        

What is this

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UVM勉強のためのコード辺です。

以下の記事を写経しています。

- [10日で身に付けるUVMの基礎](https://sites.google.com/site/playsystemverilog/uvm/xx-10ride-shenni-fukeruuvmno-ji-chu "SystemVerilogで遊ぼう！")

Environment

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動作確認

 : VCS-MX I-2014.03\_Full64