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https://github.com/enigmacurry/sap
A very simple computer written in Verilog, with a Python test bench
https://github.com/enigmacurry/sap
ben-eater fpga sap-1 verilog
Last synced: 10 days ago
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A very simple computer written in Verilog, with a Python test bench
- Host: GitHub
- URL: https://github.com/enigmacurry/sap
- Owner: EnigmaCurry
- License: other
- Created: 2018-06-16T15:50:56.000Z (over 6 years ago)
- Default Branch: master
- Last Pushed: 2018-06-27T22:59:14.000Z (over 6 years ago)
- Last Synced: 2024-11-06T00:13:00.626Z (about 2 months ago)
- Topics: ben-eater, fpga, sap-1, verilog
- Language: Verilog
- Homepage:
- Size: 43 KB
- Stars: 18
- Watchers: 5
- Forks: 6
- Open Issues: 0