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https://github.com/eyantra698sumanto/vsdopen_pll_tutorial
This repo contains documentation of the "VSD Open On-Chip Clock Multiplier (PLL) on OSU180" tutorial.
https://github.com/eyantra698sumanto/vsdopen_pll_tutorial
circuit clock fabrication frequency-divider intergrated layout magic on-chip osu180 pll vco vlsi vsd
Last synced: about 12 hours ago
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This repo contains documentation of the "VSD Open On-Chip Clock Multiplier (PLL) on OSU180" tutorial.
- Host: GitHub
- URL: https://github.com/eyantra698sumanto/vsdopen_pll_tutorial
- Owner: Eyantra698Sumanto
- License: gpl-3.0
- Created: 2021-10-18T19:50:18.000Z (about 3 years ago)
- Default Branch: main
- Last Pushed: 2022-07-17T08:18:27.000Z (over 2 years ago)
- Last Synced: 2024-11-11T12:18:43.671Z (about 2 months ago)
- Topics: circuit, clock, fabrication, frequency-divider, intergrated, layout, magic, on-chip, osu180, pll, vco, vlsi, vsd
- Homepage:
- Size: 88.9 KB
- Stars: 4
- Watchers: 1
- Forks: 1
- Open Issues: 0
-
Metadata Files:
- Readme: Readme.md
- License: LICENSE
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README
# VSD Open On-Chip Clock Multiplier (PLL) on OSU180
This repo contains documentation of the "VSD Open On-Chip Clock Multiplier (PLL) on OSU180" tutorial.
-----------------------------------------------------------------------------------------------------------------------------------------------
# Contents
- [Introduction](#introduction)
- [Block Diagram of PLL](#block-diagram-of-pll)
- [Literature review and architecture design theory points](#literature-review-and-architecture-design-theory-points)
- [Theory and Fundamental Concepts](#theory-and-fundamental-concepts)
- [Setting up Linux Environment](#setting-up-linux-environment)
- [Installations](#installations)
* [Git](#git)
* [eSim](#esim)
* [Magic](#magic)
- [Running eSim and Ngspice](#running-esim-and-ngspice)
* [eSim Schematic of inverter example](#esim-schematic-of-inverter-example)
* [Running Ngspice](#running-ngspice)
* [Output Waveforms](#output-waveforms)
- [Prelayout](#prelayout)
* [PFD Design](#pfd-design)
* [Charge Pump](#charge-pump)
* [VCO](#vco)
* [freq_div](#freq-div)
* [PLL Prelayout](#pll-prelayout)
- [Physical Design](#physical-design)
* [Layout of Inverter](#layout-of-inverter)
* [Layout of PFD](#layout-of-pfd)
* [Layout of VCO](#layout-of-vco)
* [Layout of FreqDiv2](#layout-of-freqdiv2)
* [Layout of FreqDiv8](#layout-of-freqdiv8)
* [Layout of mux21](#layout-of-mux21)
* [Final Layout of PLL](#final-layout-of-pll)
- [Acknowlegment](#acknowlegment)
- [References](#references)
# Introduction
The phase locked loop take in a signal to which it locks and can then output this signal from its own internal VCO. At first sight this may not appear particularly useful, but with a little ingenuity, it is possible to develop a large number of phase locked loop applications.
# Block Diagram of PLL
# Literature review and architecture design theory points
1. Design of Analog CMOS Integrated Circuits Behzad Razavi
2. Design of CMOS Phase Locked Loops Behzad Razavi
# Theory and Fundamental Concepts
1. CMOS and Transistor Sizing
2. Control System Feedback Loop
3. IC Fab process
4. Euler path
# Setting up Linux Environment
Download the latest version of Virtual Box from the following link:
https://www.virtualbox.org/
After installation it will look somewhat like this:
Download the Ubuntu Disk Image:
https://ubuntu.com/download/desktop
Create a new machine:
Follow the steps hereafter.
After complete installation the Ubuntu window looks like this:
# Installations
## Git
Open terminal and run:
```
sudo apt-get install git
```
Then do:
```
git clone https://github.com/parasgidd/avsdpll_3v3.git
```
## eSim
Install eSim and follow steps from here:
https://esim.fossee.in/downloads
## Magic
Run following Commands in the terminal:
git clone git://opencircuitdesign.com/magic
```
cd magic
sudo ./configure
sudo make
sudo make install
```
# Running eSim and Ngspice
## eSim Schematic of inverter example
## Running Ngspice
```
cd /avsdpll_3v3/prelayout$
ngspice inv.cir
```
## Output Waveforms
# Prelayout
## PFD Design
## Charge Pump
## VCO
## freq_div
## PLL Prelayout
# Physical Design
## Layout of Inverter
Run the following command to open Magic:
```
magic -T SCN6M_SUBM.10.tech
```
## Layout of PFD
## Layout of VCO
## Layout of FreqDiv2
## Layout of FreqDiv8
## Layout of mux21
## Final Layout of PLL
# Acknowlegment
I would like to thank Mr.Kunal Ghosh and Mr. Paras Gidd for the tutorial explained in the simplest way possible. It helped me to learn more about the PLL and layout design and simulations using Magic and Ngspice in a very easy and structured manner.
# References
1. https://www.vlsisystemdesign.com/registration/
2. https://vsdiat.com/
3. https://github.com/parasgidd/avsdpll_3v3
4. https://www.virtualbox.org/
5. http://opencircuitdesign.com/magic/download.html
6. https://esim.fossee.in/downloads
7. https://www.electronics-notes.com/articles/radio/pll-phase-locked-loop/tutorial-primer-basics.php