https://github.com/gcoonrod/u6502

Very basic 6502 SBC based on Garth Wilson design.
https://github.com/gcoonrod/u6502

Last synced: about 1 month ago
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Very basic 6502 SBC based on Garth Wilson design.

• Host: GitHub
• URL: https://github.com/gcoonrod/u6502
• Owner: gcoonrod
• License: apache-2.0
• Created: 2023-08-19T19:51:11.000Z (over 1 year ago)
• Default Branch: main
• Last Pushed: 2023-10-09T21:03:42.000Z (about 1 year ago)
• Last Synced: 2023-10-09T22:23:27.850Z (about 1 year ago)
• Language: HTML
• Size: 2.19 MB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

        
# u6502 - Single Board Computer

Very basic 6502 SBC based on the [design](http://wilsonminesco.com/6502primer/potpourri.html#BAS_CPU) by Garth Wilson.

![PCB Render](./docs/3D_front.png)

## Project Status

A rev 0 board has been fabricated and assembled. Testing is in progress.

### Known Issues

- **LCD Display** - The LCD display correctly shows the two lines that are expected at power up but only displays a single line after a reset. Assumed to be a software issue involving the initialization logic for the LCD controller.

- **ACIA** - No TX traffic is observed from the ACIA. Currently unable to determine the reason. A logic analyzer connected to the chip select and register select signals for the ACIA _seem_ to indicate that the chip is being addressed correctly.

## Design Goals & Project Objectives

- Keep it _almost_ as simple as possible.

    - Start with a proven design to reduce the likelihood of errors.

    - Keep PCB size to less than 100mm^2 to minimize fabrication cost.

    - Use only parts that are currently in production and favor through hole components where possible.

- Support TTL RS232 UART with RTS/CTS flow control.

    - Allow for the loading of programs to memory from serial.

- Support PS2 protocol for keyboard through VIA.

- Support 16 x 2 character LCD display through VIA.

    - (Optional) Support larger character or graphics LCD display.

- (Optional) Support >4 MHz CPU speed.

## Repository Structure

- [boards](./boards/) - Kicad projects containing schematics and layout files for the SBC and any ancillary support devices.

- [docs](./docs/) - Documentation and static assests for the current iteration of the u6502.

- [firmware](./firmware/) - 6502 assembly files and build tooling (cc65) to produce ROMs for the u6502.

- [tools](./tools/) - Software utilities and Arduino sketches used to support the testing and development of the u6502.

## Addres Map

- RAM $0000:3FFF

- ACIA $4400:4403

- VIA2 $5000:500F

- VIA1 $6000:600F

- ROM $8000:FFFF

## Parts Selection

- CPU - W65C02S (PLCC) WDC current production 65C02

- Memory - AS7C256B-15PIN (DIP) SRAM chosen for package size more than speed

- ROM - Any 28C256 JEDEC compatible EEPROM (DIP) 

- Address Decoding - 74HC00 (DIP)

- IRQ Control - 74HC21 (DIP)

- GPIO - 2 W65C22S VIAs (PLCC)

- Serial IO - W65C51N ACIA (DIP)

- Power Regulation - LM7805 (TO220) compatible linear regulator

- Oscillators - 1MHz CPU clock & 1.8432 MHz for baud clock generation

- Reset control - DS1813 (TO92)