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https://github.com/geraked/verilog-rle
Verilog Implementation of Run Length Encoding for RGB Image Compression
https://github.com/geraked/verilog-rle
compression-algorithm computer-engineering fpga fpga-programming geraked image-compression image-processing ise matlab rabist rle rle-compression-algorithm run-length-encoding student-project verilog verilog-code verilog-hdl xilinx xilinx-fpga yazd-university
Last synced: about 1 month ago
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Verilog Implementation of Run Length Encoding for RGB Image Compression
- Host: GitHub
- URL: https://github.com/geraked/verilog-rle
- Owner: geraked
- License: mit
- Created: 2020-07-30T09:45:05.000Z (over 4 years ago)
- Default Branch: master
- Last Pushed: 2021-06-28T05:59:49.000Z (over 3 years ago)
- Last Synced: 2023-06-28T07:29:04.705Z (over 1 year ago)
- Topics: compression-algorithm, computer-engineering, fpga, fpga-programming, geraked, image-compression, image-processing, ise, matlab, rabist, rle, rle-compression-algorithm, run-length-encoding, student-project, verilog, verilog-code, verilog-hdl, xilinx, xilinx-fpga, yazd-university
- Language: Verilog
- Homepage:
- Size: 11.6 MB
- Stars: 16
- Watchers: 3
- Forks: 3
- Open Issues: 0