https://github.com/ilyachichkov/verilog_labs_2023

Verilog & C Language practice
https://github.com/ilyachichkov/verilog_labs_2023

drivers fpga hardware low-level verilog

Last synced: 20 days ago
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Verilog & C Language practice

• Host: GitHub
• URL: https://github.com/ilyachichkov/verilog_labs_2023
• Owner: IlyaChichkov
• Created: 2023-03-22T09:27:31.000Z (almost 2 years ago)
• Default Branch: master
• Last Pushed: 2023-05-23T15:30:14.000Z (over 1 year ago)
• Last Synced: 2024-11-09T15:13:56.277Z (3 months ago)
• Topics: drivers, fpga, hardware, low-level, verilog
• Language: SystemVerilog
• Homepage:
• Size: 46.3 MB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0

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