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https://github.com/jesseopdenbrouw/convert-bdf-to-vhdl
Convert Intel (Altera) BDF files to VHDL and start ModelSim
https://github.com/jesseopdenbrouw/convert-bdf-to-vhdl
Last synced: about 1 month ago
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Convert Intel (Altera) BDF files to VHDL and start ModelSim
- Host: GitHub
- URL: https://github.com/jesseopdenbrouw/convert-bdf-to-vhdl
- Owner: jesseopdenbrouw
- Created: 2021-08-27T17:30:37.000Z (over 3 years ago)
- Default Branch: master
- Last Pushed: 2024-11-07T17:04:18.000Z (about 2 months ago)
- Last Synced: 2024-11-07T18:19:22.123Z (about 2 months ago)
- Language: TeX
- Size: 534 KB
- Stars: 0
- Watchers: 2
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
Awesome Lists containing this project
README
# Convert Intel (Altera) Block-Design-Files (BDF) to VHDL files and start ModelSim
As the title says...