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https://github.com/jiegec/verilog-format
A naive verilog/systemverilog formatter
https://github.com/jiegec/verilog-format
Last synced: about 1 month ago
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A naive verilog/systemverilog formatter
- Host: GitHub
- URL: https://github.com/jiegec/verilog-format
- Owner: jiegec
- License: mit
- Created: 2019-09-19T00:57:43.000Z (over 5 years ago)
- Default Branch: master
- Last Pushed: 2022-10-29T01:01:58.000Z (about 2 years ago)
- Last Synced: 2024-10-26T22:48:36.371Z (3 months ago)
- Language: SystemVerilog
- Homepage:
- Size: 61.5 KB
- Stars: 20
- Watchers: 3
- Forks: 2
- Open Issues: 0
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Metadata Files:
- Readme: README.md
- License: LICENSE
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README
# verilog-format
A naive verilog/systemverilog formatter. Works on tokens instead of AST with minimal lexical analysis.
## Usage
`verilog-format --file `
It will print the formatted file to stdout.
## License
Licensed under MIT license.