https://github.com/joaosilvait/integer-multiplier

Project made in my 1st year at University using Structural VHDL to implement a 4 bit integer multiplier using the MAX DE10-Lite Board
https://github.com/joaosilvait/integer-multiplier

de10-lite fpga quartus-prime vhdl

Last synced: 21 days ago
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Project made in my 1st year at University using Structural VHDL to implement a 4 bit integer multiplier using the MAX DE10-Lite Board

• Host: GitHub
• URL: https://github.com/joaosilvait/integer-multiplier
• Owner: JoaoSilvaIT
• Created: 2024-10-11T01:38:07.000Z (2 months ago)
• Default Branch: main
• Last Pushed: 2024-10-11T01:45:27.000Z (2 months ago)
• Last Synced: 2024-10-29T02:26:36.969Z (about 2 months ago)
• Topics: de10-lite, fpga, quartus-prime, vhdl
• Language: VHDL
• Homepage:
• Size: 5.24 MB
• Stars: 1
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# Integer-Multiplier

Project made on my 1st year using Structural VHDL to implement a 4 bit integer multiplier using the MAX DE10-Lite Board

To run this program you would need to install the Quartus Prime software and connect the MAX DE10-LITE Board via USB.