https://github.com/junjuew/looper

Out-of-order Superscalar Processor with Hardware Loop Unrolling
https://github.com/junjuew/looper

Last synced: about 2 months ago
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Out-of-order Superscalar Processor with Hardware Loop Unrolling

• Host: GitHub
• URL: https://github.com/junjuew/looper
• Owner: junjuew
• Created: 2014-04-06T19:34:30.000Z (over 10 years ago)
• Default Branch: master
• Last Pushed: 2020-05-07T16:25:50.000Z (over 4 years ago)
• Last Synced: 2023-08-31T22:12:09.394Z (over 1 year ago)
• Language: Verilog
• Homepage:
• Size: 5.36 MB
• Stars: 0
• Watchers: 8
• Forks: 0
• Open Issues: 1
• Metadata Files:
  • Readme: README.md

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README

        
# Overview

This is a 7-people semester-long digital hardware capstone project for University of Wisconsin-Madison ECE deparment 

([ECE554/ECE901](https://guide.wisc.edu/courses/e_c_e/)).

This repository implements an out-of-order superscalar processor called Looper. Looper is a 4-issue

superscalar, out-of-order execution, 7-stage pipelined processor, with special designs inspired by

Mitchell Hayenga’s [Revolver architecture](https://ieeexplore.ieee.org/abstract/document/6835968), 

including frontend loop detection, training and dispatch, and 

multiple backend supporting schemes in issue queue, re-order buffer and load/store queue. 

See [this report](ECE901_Final_Report_LOOPERS.pdf) for design and implementation details.