https://github.com/kareimgazer/pci_target_device

Verilog simulation for a Target Device on a PCI bus with read and write transactions.
https://github.com/kareimgazer/pci_target_device

pci pci-devices verilog xilin xilinx-vivado

Last synced: 7 months ago
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Verilog simulation for a Target Device on a PCI bus with read and write transactions.

• Host: GitHub
• URL: https://github.com/kareimgazer/pci_target_device
• Owner: KareimGazer
• Created: 2021-01-16T09:09:39.000Z (over 4 years ago)
• Default Branch: main
• Last Pushed: 2021-02-12T18:53:05.000Z (over 4 years ago)
• Last Synced: 2025-02-03T12:43:05.250Z (8 months ago)
• Topics: pci, pci-devices, verilog, xilin, xilinx-vivado
• Language: Verilog
• Homepage:
• Size: 7.81 KB
• Stars: 2
• Watchers: 2
• Forks: 5
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

          
# PCI_Target_Device

Verilog simulation for a Target Device on a PCI bus with read and write transactions.