https://github.com/katef/eurorack-cpu

A CPU implemented in a modular synthesizer
https://github.com/katef/eurorack-cpu

cpu-emulator modular processor-design synthesizer

Last synced: 11 days ago
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A CPU implemented in a modular synthesizer

• Host: GitHub
• URL: https://github.com/katef/eurorack-cpu
• Owner: katef
• Created: 2021-12-29T18:42:29.000Z (about 4 years ago)
• Default Branch: main
• Last Pushed: 2022-03-20T03:32:04.000Z (almost 4 years ago)
• Last Synced: 2025-07-05T17:12:45.030Z (7 months ago)
• Topics: cpu-emulator, modular, processor-design, synthesizer
• Homepage:
• Size: 33.7 MB
• Stars: 304
• Watchers: 7
• Forks: 8
• Open Issues: 1
• Metadata Files:
  • Readme: README.md

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README

          
## A CPU implemented in an analog modular synthesizer

This runs in the [VCV Rack](https://vcvrack.com/) eurorack simulator.

I wrote a thread explaining the CPU [on twitter](https://twitter.com/thingskatedid/status/1476679065411022849)  

and a thread [explaining just the ripple adder](https://twitter.com/thingskatedid/status/1475128017374437380).

TODO list: https://github.com/katef/eurorack-cpu/issues/1

![](img/cpu-layout-annotated.png)

[Here's the unannotated screenshot](img/cpu.png)

and [here's a video of the whole thing running](img/cpu-running.mp4?raw=true)

Instruction formats:

```

00000: no-op (clears bus)

10ooo: output ALU op to bus

010rr: load reg from bus (keeps bus)

110rr: output register to bus

0110n: load ALU operand (clears bus)

0111i: output immediate to bus

ooo = alu op

rr = register number

n = alu operand

i = immediate

```

## Fetch and Decode

![](img/instruction-decoder.png)

[and a video of it running](img/instruction-decoding-running.mp4?raw=true)

## Data bus

![](img/bus-load-store.png)

## 3-Stage Clock

![](img/clock-stages.gif)

## A single register

![](img/single-register.png)

## Register bank

![](img/register-bank.gif)

![and a video of it running](img/register-bank-running.mp4?raw=true)

## Immediate value

![](img/output-immediate.png)

## ALU

![](img/alu.png)

## Ripple carry adder

![](img/adder.png)

![](img/adder-sine.png)