https://github.com/kotarot/sqrt

Circuit design calculating square root (sqrt) in Verilog HDL.
https://github.com/kotarot/sqrt

Last synced: about 2 months ago
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Circuit design calculating square root (sqrt) in Verilog HDL.

• Host: GitHub
• URL: https://github.com/kotarot/sqrt
• Owner: kotarot
• Created: 2015-07-20T14:38:14.000Z (over 9 years ago)
• Default Branch: master
• Last Pushed: 2016-09-24T10:07:55.000Z (over 8 years ago)
• Last Synced: 2023-03-24T19:28:48.704Z (almost 2 years ago)
• Language: Verilog
• Homepage:
• Size: 3.91 KB
• Stars: 2
• Watchers: 1
• Forks: 0
• Open Issues: 0

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