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https://github.com/lasithaamarasinghe/uart-implementation-in-fpga
This is a group assignment done under semester 4 module EN2111:Electronic Circuit Design, .
https://github.com/lasithaamarasinghe/uart-implementation-in-fpga
fpga quartus-prime uart verilog
Last synced: about 8 hours ago
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This is a group assignment done under semester 4 module EN2111:Electronic Circuit Design, .
- Host: GitHub
- URL: https://github.com/lasithaamarasinghe/uart-implementation-in-fpga
- Owner: LasithaAmarasinghe
- Created: 2024-05-08T10:30:02.000Z (8 months ago)
- Default Branch: main
- Last Pushed: 2024-05-09T01:13:21.000Z (8 months ago)
- Last Synced: 2024-11-11T17:08:45.299Z (about 2 months ago)
- Topics: fpga, quartus-prime, uart, verilog
- Language: Verilog
- Homepage:
- Size: 4.11 MB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0