https://github.com/layheng-hok/digital-piano
Digital Piano: FPGA project in Verilog based on Xilinx Atrix-7 EGO1 - SUSTech's project of course CS207: Digital Logic in Fall 2023 - Score: 120/100
https://github.com/layheng-hok/digital-piano
cs207 digital-logic digital-piano embedded-systems fall2023 fpga piano sustech verilog vivado xilinx
Last synced: 3 months ago
JSON representation
Digital Piano: FPGA project in Verilog based on Xilinx Atrix-7 EGO1 - SUSTech's project of course CS207: Digital Logic in Fall 2023 - Score: 120/100
- Host: GitHub
- URL: https://github.com/layheng-hok/digital-piano
- Owner: Layheng-Hok
- Created: 2023-12-02T08:46:19.000Z (over 1 year ago)
- Default Branch: main
- Last Pushed: 2025-03-08T03:51:23.000Z (3 months ago)
- Last Synced: 2025-03-08T04:27:13.396Z (3 months ago)
- Topics: cs207, digital-logic, digital-piano, embedded-systems, fall2023, fpga, piano, sustech, verilog, vivado, xilinx
- Language: Verilog
- Homepage:
- Size: 9.96 MB
- Stars: 2
- Watchers: 1
- Forks: 1
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
Awesome Lists containing this project
README
# Electronic Piano Learning Machine
Electronic Piano Learning Machine is a piano project implemented in Verilog based on Xilinx Artix-7 FPGA development board, EGO1 (XC7A35T-1CSG324C).
[*[Read the detailed project specifications]*](https://github.com/Layheng-Hok/Digital-Piano/blob/main/digital_piano/Project%20Specifications.pdf)
[*[Read the detailed project report]*](https://github.com/Layheng-Hok/Digital-Piano/blob/main/digital_piano/Project%20Report%20-%20Digital%20Piano.pdf)
# Preview
### Control Diagram of FPGA Board
### Demo
https://github.com/user-attachments/assets/e98288dc-9774-453f-8db2-3790fe4e0adb# Functionalities
+ Free mode: play any of the 7 notes (do, re, mi, fa, so, la, and si) freely
+ Autoplay mode: listen to any songs from the music library (Twinkle Twinkle Little Star, Two Tigers, and Ode to Joy)
+ Learning mode: learn how to play any songs from the music library with real-time performance rating
+ Save user's highest score in learning mode (support up to 3 users)
+ Support octave adjustment in every mode, including high, normal, and low ocatave, hence able to output 7×3 = 21 different music notes
+ Support speed adjustment in autoplay mode
+ Support VGA, LED, and seven-segment display output for intuitive and convenient interaction with the FPGA board# Contributors
+ [Liu Gan](https://github.com/gumlau): autoplay mode and learning mode
+ [Hok Layheng](https://github.com/Layheng-Hok): free mode and VGA
+ [Zerhouni Khal Jaouhara](https://github.com/Jouwy): octave adjustment, code specification, and report