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https://github.com/leobel96/polito-sdi-reflexesanalyzer

Teamwork project of a reflexes analyzer made during the course "Sistemi Digitali Integrati" (Integrated Digital Systems) @ Politecnico di Torino
https://github.com/leobel96/polito-sdi-reflexesanalyzer

digital-electronics fpga integrated-circuits modelsim quartus vhdl

Last synced: 19 days ago
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Teamwork project of a reflexes analyzer made during the course "Sistemi Digitali Integrati" (Integrated Digital Systems) @ Politecnico di Torino

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