https://github.com/leocelente/fpga-projects

A place to save my fpga projects while learning the basics
https://github.com/leocelente/fpga-projects

cyclone-iv fpga verilog

Last synced: about 1 month ago
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A place to save my fpga projects while learning the basics

• Host: GitHub
• URL: https://github.com/leocelente/fpga-projects
• Owner: leocelente
• Created: 2020-03-23T02:14:37.000Z (about 5 years ago)
• Default Branch: master
• Last Pushed: 2020-03-23T02:46:22.000Z (about 5 years ago)
• Last Synced: 2023-09-10T01:01:00.556Z (over 1 year ago)
• Topics: cyclone-iv, fpga, verilog
• Language: Mathematica
• Size: 407 KB
• Stars: 2
• Watchers: 3
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# fpga-projects

A place to save my fpga projects while learning the basics

Note that the vga project uses a PLL IP and such file could not be uploaded to github

![pinout](fpga-pinout.jpg)

![diagram](fpga-diagram.jpg)