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https://github.com/madh93/scpu
Simple 16-bit CPU written in Verilog.
https://github.com/madh93/scpu
cpu datapath verilog
Last synced: about 2 months ago
JSON representation
Simple 16-bit CPU written in Verilog.
- Host: GitHub
- URL: https://github.com/madh93/scpu
- Owner: Madh93
- License: mit
- Created: 2015-06-01T22:52:24.000Z (over 9 years ago)
- Default Branch: master
- Last Pushed: 2015-07-09T23:02:59.000Z (over 9 years ago)
- Last Synced: 2023-02-26T10:26:36.647Z (almost 2 years ago)
- Topics: cpu, datapath, verilog
- Language: Verilog
- Size: 25.3 MB
- Stars: 0
- Watchers: 3
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
README
# scpu
Simple 16-bit CPU written in Verilog.**Tested on Altera Quartus II Software Version 12.1 and Kubuntu 14.04**
# Datapath
![Alt text](http://oi58.tinypic.com/sqh8v7.jpg "Datapath")
# Aditional software
**Assembler:** [Rips - Simple assembler written in Ruby](https://github.com/Madh93/rips/)