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https://github.com/manpen/embedded-logic-analyzer

A simple embedded logic analyzer intended for debugging of FPGA designs
https://github.com/manpen/embedded-logic-analyzer

Last synced: 2 months ago
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A simple embedded logic analyzer intended for debugging of FPGA designs

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README

        

This project is under development and not intended
for public use yet. While the hardware should work quite
well with the Xilinx Toolchain (tested with Spartan 3
and Virtex 4), the software client is rarely tested.

There is no explicit english documentation yet, but each
vhd-file contains a brief introduction, and the c++ codes
include doxygen annotations. Additionally in the doc-folder
there's an example showing how-to embed the core.