https://github.com/markus-k/rv32-soc

A simple RISC-V SoC based on picorv32
https://github.com/markus-k/rv32-soc

cpu fpga mojov3 risc-v riscv riscv-soc soc spartan6 vhdl xilinx xilinx-fpga

Last synced: about 1 month ago
JSON representation

A simple RISC-V SoC based on picorv32

• Host: GitHub
• URL: https://github.com/markus-k/rv32-soc
• Owner: markus-k
• Created: 2020-01-28T09:49:22.000Z (almost 5 years ago)
• Default Branch: master
• Last Pushed: 2020-04-06T16:06:46.000Z (over 4 years ago)
• Last Synced: 2024-11-21T18:12:36.708Z (about 1 month ago)
• Topics: cpu, fpga, mojov3, risc-v, riscv, riscv-soc, soc, spartan6, vhdl, xilinx, xilinx-fpga
• Language: VHDL
• Size: 26.4 KB
• Stars: 2
• Watchers: 2
• Forks: 0
• Open Issues: 0

Awesome Lists containing this project