https://github.com/mattco98/legv8-processor

A Verilog implementation of a LEGv8 Processor
https://github.com/mattco98/legv8-processor

armv8 computer-arch legv8 processor verilog

Last synced: 2 days ago
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A Verilog implementation of a LEGv8 Processor

• Host: GitHub
• URL: https://github.com/mattco98/legv8-processor
• Owner: mattco98
• License: mit
• Created: 2019-04-09T17:00:23.000Z (over 5 years ago)
• Default Branch: master
• Last Pushed: 2019-05-19T04:10:24.000Z (over 5 years ago)
• Last Synced: 2024-11-01T18:42:15.025Z (about 2 months ago)
• Topics: armv8, computer-arch, legv8, processor, verilog
• Language: Verilog
• Size: 4.25 MB
• Stars: 6
• Watchers: 3
• Forks: 2
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

        
# LEGv8 Processor

This is a very simple implementation of a LEGv8 Processor, which is a subset of ARMv8. The goal of this project is to implement most (preferably all) of the information contained in the [LEGv8 Reference Guide](resources/LEGv8_Reference.pdf). 

## Motivation

This project was originally created as part of ELC 3338 at Baylor University. I heavily enjoyed the project, and chose to continue the development of the processor on my own.

_Sidenote to any possible ELC 3338 students who have stumbled across this repository: I've made certain choices to intentionally make this repository hard to copy from. I'd recommend not copying anything from this repo._

## Projects

There are three projects in this repository:

- nonpipelined/: This is the single-stage, nonpipelined version of the processor.

- pipelined/: (TODO) This is the pipelined version of the processor, with no data forwarding or hazard protection.

- pipelined-forward-hazard/: (TODO) This is the pipelined version of the processor, with both data forwarding and hazard protection.

## Hardware Hierarchy

Nonpipelined:







![NonpipelinedDatapath](./nonpipelined/diagram.png)

## Instructions

Initially, this project supported eight instructions: `ADD`, `SUB`, `AND`, `ORR`, `LDUR`, `STUR`, `B`, `CBZ`. The goal is to eventually support all of the instructions referenced in the [LEGv8 Reference Guide](resources/LEGv8_Reference.pdf). These are as follows:

- [x] ADD

- [x] ADDI

- [x] ADDIS

- [x] ADDS

- [x] AND

- [x] ANDI

- [x] ANDIS

- [x] ANDS

- [x] B

- [x] B.cond

- [x] BL

- [x] BR

- [x] CBNZ

- [x] CBZ

- [x] EOR

- [x] EORI

- [x] LDUR

- [x] LDURB

- [x] LDURH

- [x] LDURSW

- [ ] LDXR

- [x] LSL

- [x] LSR

- [x] MOVK

- [x] MOVZ

- [x] ORR

- [x] ORRI

- [x] STUR

- [x] STURB

- [x] STURH

- [x] STURW

- [ ] STXR

- [x] SUB

- [x] SUBI

- [x] SUBIS

- [x] SUBS

- [x] CMP

- [x] CMPI

- [x] LDA

- [x] MOV

- [x] FADDS

- [ ] FADDD

- [ ] FCMPS

- [ ] FCMPD

- [ ] FDIVS

- [ ] FDIVD

- [ ] FMULS

- [ ] FMULD

- [x] FSUBS

- [ ] FSUBD

- [ ] LDURS

- [ ] LDURD

- [x] MUL

- [x] SDIV

- [x] SMULH

- [ ] STURS

- [ ] STURD

- [x] UDIV

- [x] UMULH

## Acknowledgements

As this project was primarily about learning, I took a lot of inspiration from other similar projects. They are listed below:

- https://github.com/danshanley/FPU - Huge help on some FPU algorithms which I couldn't quite figure out myself.