https://github.com/matthijsbos/fpga-edu

https://github.com/matthijsbos/fpga-edu

Last synced: 5 days ago
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• Host: GitHub
• URL: https://github.com/matthijsbos/fpga-edu
• Owner: matthijsbos
• Created: 2015-05-13T14:31:16.000Z (over 9 years ago)
• Default Branch: master
• Last Pushed: 2015-05-16T22:18:11.000Z (over 9 years ago)
• Last Synced: 2023-03-30T14:33:41.282Z (over 1 year ago)
• Language: VHDL
• Size: 19.6 MB
• Stars: 0
• Watchers: 2
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# FPGA EDU #

My computer science bachelor thesis project repository.

## Requirements ##

- Digilent Nexys-4 board with Xilinx Artix-7 FPGA

- Xilinx Vivado 2015.1

- Xilinx SDK 2015.1

## Installation ##

- See `Vivado\README.md` for Xilinx Vivado installation instructions.

- See `SDK\README.md` for Xilinx SDK installation instructions.