https://github.com/mattvenn/wrapped_mbsfsk

https://github.com/mattvenn/wrapped_mbsfsk

Last synced: about 2 months ago
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• Host: GitHub
• URL: https://github.com/mattvenn/wrapped_mbsfsk
• Owner: mattvenn
• License: apache-2.0
• Created: 2022-06-08T20:35:07.000Z (almost 3 years ago)
• Default Branch: main
• Last Pushed: 2022-06-08T21:23:30.000Z (almost 3 years ago)
• Last Synced: 2025-04-01T18:09:57.754Z (about 2 months ago)
• Language: Verilog
• Size: 3.32 MB
• Stars: 1
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

        
![](../../workflows/multi_tool/badge.svg)

# Information about your project

This project outputs IFFT symbols based on pseudo-random incoming data.

The tools that will test and create the aggregated design are here: https://github.com/mattvenn/multi_project_tools

# Project info.yaml

You need to fill in the fields of [info.yaml](info.yaml)

See [here for more information](https://github.com/mattvenn/multi_project_tools/blob/main/docs/project_spec.md)

# Zero to ASIC Course

This project was made as part of the [Zero to ASIC Course](https://zerotoasiccourse.com)!

# License

This project is [licensed under Apache 2](LICENSE)