https://github.com/mmicko/enigmaFPGA
Enigma in FPGA
https://github.com/mmicko/enigmaFPGA
blackice fpga goboard ice40 verilog yosys
Last synced: 6 months ago
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Enigma in FPGA
- Host: GitHub
- URL: https://github.com/mmicko/enigmaFPGA
- Owner: mmicko
- License: mit
- Created: 2017-09-09T13:06:34.000Z (about 8 years ago)
- Default Branch: master
- Last Pushed: 2019-05-18T09:57:12.000Z (over 6 years ago)
- Last Synced: 2025-03-27T05:32:09.504Z (7 months ago)
- Topics: blackice, fpga, goboard, ice40, verilog, yosys
- Language: Verilog
- Size: 1.92 MB
- Stars: 29
- Watchers: 3
- Forks: 3
- Open Issues: 0
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Metadata Files:
- Readme: README.md
- License: LICENSE
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README
# enigmaFPGA
Enigma in FPGA, made for learning Verilog as part of presentation on BalcCon 2017.
Version of code from conference is at separate branch (Balccon2017):
https://github.com/mmicko/enigmafpga/tree/Balccon2017
Due to limitation of presentation uart_rx and uart_tx modules are used from :
https://www.nandland.com/vhdl/modules/module-uart-serial-port-rs232.html
Project contains build files for various targets.
* make - creates binary for Go Board (using yosis and arachne-pnr)
* make blackice - creates binary for BlackIce FPGA
* make prog - programs Go Board (using iceprog)
* make test - run Verilog test for encryption (using iverilog)
* make testrotor - run Verilog test for rotor rotating (using iverilog)
* make run - run C++ tests (using verilator)
More explanation and Javascript reference application at : http://enigma.louisedade.co.uk/enigma.html