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https://github.com/mohammadmahdi-abdolhosseini/digital-logic-courses
Digital Systems 1 & 2 + Digital Systems Laboratory 1 + Digital Electronics Circuit +Microprocessor Based and Embedded Design courses projects
https://github.com/mohammadmahdi-abdolhosseini/digital-logic-courses
hspice systemverilog verilog
Last synced: 2 days ago
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Digital Systems 1 & 2 + Digital Systems Laboratory 1 + Digital Electronics Circuit +Microprocessor Based and Embedded Design courses projects
- Host: GitHub
- URL: https://github.com/mohammadmahdi-abdolhosseini/digital-logic-courses
- Owner: MohammadMahdi-Abdolhosseini
- Created: 2023-10-22T06:26:58.000Z (about 1 year ago)
- Default Branch: main
- Last Pushed: 2023-10-22T08:31:35.000Z (about 1 year ago)
- Last Synced: 2024-11-10T11:06:41.203Z (2 months ago)
- Topics: hspice, systemverilog, verilog
- Language: Lex
- Homepage:
- Size: 23.9 MB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0
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Metadata Files: